SAF7113H |
RFQ for SAF7113H |
![]() |
| Technical/Catalog Information | SAF7113H/V1,557 |
| Vendor | NXP Semiconductors |
| Category | Integrated Circuits (ICs) |
| Mounting Type | Surface Mount |
| Package / Case | 44-QFP |
| Type | Video Processor |
| Packaging | Tray |
| Applications | AGP Cards, PCMCIA, Video Phones |
| Drawing Number | 568; SOT307; ; |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Other Names | SAF7113H V1,557 SAF7113HV1,557 568 1319 ND 5681319ND 568-1319 |
| Product | Manufacturers | Pack | D/C |
| SAF7113H | - | QFP-44P | - |
The 9-bit video input processor is a combination of a two-channel analog preprocessing circuit including source selection, anti-aliasing filter and ADC, an automatic clamp and gain control, a Clock Generation Circuit (CGC), a digital multi-standard decoder (PAL BGHI, PAL M, PAL N,combination PAL N, NTSC M, NTSC-Japan, NTSC N and SECAM), a brightness, contrast and saturation control circuit, a multi-standard VBI data slicer and a 27 MHz VBI data bypass; see Fig.1.
The pure 3.3 V CMOS circuit SAF7113H, analog front-end and digital video decoder, is a highly integrated circuit for desktop video applications. The decoder is based on the principle of line-locked clock decoding and is able to decode the colour of PAL, SECAM and NTSC signals into ITU-R BT.601 compatible colour component values. The SAF7113H accepts as analog inputs CVBS or S-video (Y/C) from TV or VTR sources. The circuit is I2C-bus controlled.
The integrated high performance multi-standard data slicer supports several VBI data standards:
· Teletext [WST (World Standard Teletext), CCST (Chinese teletext)] (625 lines)
· Teletext [US-WST, NABTS (North-American Broadcast Text System) and MOJI (Japanese teletext)] (525 lines)
· Closed caption [Europe, US (line 21)]
· Wide Screen Signalling (WSS)
· Video Programming Signal (VPS)
· Time codes (VITC EBU/SMPTE)
· HIGH-speed VBI data bypass for intercast application.
Typical Application |
Features |
| · Notebook (low power consumption)· PCMCIA card application· AGP based graphics cards· Image processing· Video phone applications· Intercast and PC teletext applications· Security applications. | ` Four analog inputs, internal analog source selectors,e.g. 4 * CVBS or 2 * Y/C or (1 * Y/C and 2 * CVBS)` Two analog preprocessing channels in differential CMOS style for best S/N-performance ` Fully programmable static gain or automatic gain control for the selected CVBS or Y/C channel` Switchable white peak control` Two built-in analog anti-aliasing filters` Two 9-bit video CMOS Analog-to-Digital Converters (ADCs), digitized CVBS or Y/C-signals are available on the VPO-port via I2C-bus control` On-chip clock generator` Line-locked system clock frequencies` Digital PLL for horizontal sync processing and clock generation, horizontal and vertical sync detection` Requires only one crystal (24.576 MHz) for all standards` Automatic detection of 50 and 60 Hz field frequency,and automatic switching between PAL and NTSC standards` Luminance and chrominance signal processing for PAL BGHI, PAL N, combination PAL N, PAL M,NTSC M, NTSC N, NTSC 4.43, NTSC-Japan and SECAM` User programmable luminance peaking or aperture correction` Cross-colour reduction for NTSC by chrominance comb filtering` PAL delay line for correcting PAL phase errors` Brightness Contrast Saturation (BCS) and hue control on-chip` Real-time status information output (RTCO)` Two multi functional real-time output pins controlled by I2C-bus ` Multi-standard VBI-data slicer decoding World Standard Teletext (WST), North-American Broadcast Text System (NABTS), closed caption, Wide Screen Signalling (WSS), Video Programming System (VPS),Vertical Interval Time Code (VITC) variants (EBU/SMPTE) etc.` Standard ITU 656 YUV 4 : 2 : 2 format (8-bit) on VPO output bus` Enhanced ITU 656 output format on VPO output bus containing: active video raw CVBS data for |
|
SYMBOL |
PARAMETER |
CONDITIONS |
MIN. |
MAX. |
UNIT |
|
VDDD |
digital supply voltage |
-0.5 |
+4.6 |
V | |
|
VDDA |
analog supply voltage |
-0.5 |
+4.6 |
V | |
|
ViA |
input voltage at analog inputs |
-0.5 |
VDDA + 0.5 (4.6 max) |
V | |
|
VoA |
output voltage at analog output |
-0.5 |
VDDA + 0.5 |
V | |
|
VoD |
output voltage at digital outputs |
outputs active |
-0.5 |
VDDA + 0.5 |
V |
|
VSS |
voltage difference between VSSA(all) and VSS(all) |